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Espressif Systems /ESP32-H2 /EFUSE /WR_TIM_CONF0_RS_BYPASS

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Interpret as WR_TIM_CONF0_RS_BYPASS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BYPASS_RS_CORRECTION)BYPASS_RS_CORRECTION 0BYPASS_RS_BLK_NUM0 (UPDATE)UPDATE 0TPGM_INACTIVE

Description

Configurarion register0 of eFuse programming time parameters and rs bypass operation.

Fields

BYPASS_RS_CORRECTION

Set this bit to bypass reed solomon correction step.
BYPASS_RS_BLK_NUM

Configures block number of programming twice operation.
UPDATE

Set this bit to update multi-bit register signals.
TPGM_INACTIVE

Configures the inactive programming time.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data